Silicon photonics (SiPh) is an established platform for realizing complex and powerful PICs. Leveraging the high material quality and compatibility of SiPh platforms with mature complementary metal oxide semiconductor technology, SiPh has been applied to sensing, signal processing, quantum science, telecommunications, etc. However, native integration of functional optical elements and light sources (e.g., lasers, modulators, optical switches, tunable filters, photoelectronic detectors, and semiconductor optical amplifiers (SOAs)) has not been achieved. Therefore, many optical functions cannot be performed, which restricts the application range. Thus, III-V semiconductor devices must be integrated into PICs. Heterogeneous integration with multiple devices, enabling the desired functionalities on SiPh wafers, has been attempted. Epitaxial growth is promising, leveraging the best properties of III–V devices and advanced Si fabrication processes. Moreover, it enables precise control over thin film parameters, ensuring high crystal quality. However, the device reliability and performance require further demonstration and improvement. Heterogeneous integration through wafer–wafer or die–wafer bonding allows low-loss evanescent optical coupling from III–V devices to SiPh circuits. This approach enhances system integration, making it suitable for large-scale mass production while reducing the packaging cost. However, the SiPh back-end flows must be modified and significant capital investment is required. Flip-chip hybrid integration, where finished Ⅲ-Ⅴ device chips are directly assembled on SiPh enables independent Ⅲ-Ⅴ and Si optimization and qualification. However, the high packaging cost and limited alignment tolerance render this approach unsuitable for mass manufacturing and dense integration.
TP technology emerged as an innovative integration method. By leveraging the viscoelastic properties of elastic stamps and precisely controlling interfacial adhesion forces, this technology enables the transfer of micro/nano-scale devices from their native substrates to target silicon-based substrates through a "printing" process. This TP technique combines the merits of wafer bonding and flip-chip integration, enabling high throughput and device-quality pre-testing on the growth substrate, respectively, creating a heterogeneous integration pathway that delivers high precision, low thermal budget, and economic efficiency. To date, the technology has been successfully applied to integrate various high-performance silicon-based and silicon nitride-based semiconductor lasers, optical amplifiers, and detectors, establishing a robust technical foundation for expanding the application scope of photonic integrated circuits.
In a new paper published in Light: Science & Applications, a team of scientists, led by Academician Lijun Wang from the State Key Laboratory of Luminescence Science and Technology, Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, China has provided a comprehensive review of TP techniques and their applications in PICs. The co-corresponding authors of the paper are Researcher Lei Liang, Researcher Yongyi Chen, Associate Researcher Yuxin Lei and Academician Lijun Wang. The first author is doctoral candidate Can Yu.
The core principle of TP technique: each TP shows unique capabilities, adhesion switching ratio (ASR) as the key indicator.
Kinetically controlled TP
Stamp material: elastomeric polymer
Regulated parameter: peel-off velocity (ASR~3); bending radius
Application: Au thin film; Si/GaAs micro-structure, and etc.
Technical feature: effective; limited ASR
Surface chemical reaction- or additional layer-assisted TP
Stamp material: elastomeric polymer; thermal release tape; solvent release tape; photosensitive tape; PNIPAAm; sugar mixture;
Regulated parameter: amount of chemical bonds; temperature (infinite ASR); solvent category (ASR>200); light intensity and exposure time (ASR=117.5); temperature; solvent amount and temperature (infinite ASR)
Application: GaAs/InP micro/nano wire arrays; neutral electrode arrays; Si plate arrays/Si photodetector arrays; 2D gold nanoparticle arrays; thin metal strips; Au nanowire arrays/LED circuits, and etc.
Technical feature: larger ASR; solution or sacrificial layer residual may damage device performance
Laser-driven non-contact TP
Stamp material: elastomeric polymer or shape memory polymer
Regulated parameter: light intensity and exposure time (infinite ASR)
Application: Si platelet; micro LED, and etc.
Technical feature: infinite ASR, can realize selective TP process and the transfer yield is not affected by the morphology and properties of target substrate; high temperature may affect devices performance
Bio-inspired TP
Stamp material: elastomeric polymer mimicking the gecko, aphid and octopus biological structure
Regulated parameter: shear force (ASR~204); contact area (ASR>1000); cavity pressure (ASR~293)
Application: Si thin membrane; Si platelet; InGaAs nano-film/nano-ribbon, and etc.
Technical feature: larger ASR, and can realize selective TP process; require complex stamp fabrication procedures, etc.
Other TPs
Stamp material: liquid-droplet stamp; balloon stamp; wrap-like stamp
Regulated parameter: liquid-droplet volume (ASR<25); external pressure; external pressure
Application: inorganic flexible thin film/micro-LED; Si platelet/Si-based solar cells/Si-based photodetector; light-emitting arrays/solar cells, and etc.
Technical feature: devices can be transferred to curved surfaces; require complex stamp fabrication procedures
The most widely used TP method for integrating III–V semiconductor devices onto PICs combines the elastomeric-stamp rate-dependent adhesion effect and gecko-inspired shear-enhanced TP. Various Ⅲ-Ⅴ semiconductor devices have been transferred from donor substrates to PICs via TP without performance loss, including SOAs with high gain and saturation power, narrow-linewidth lasers, high-performance photodetectors, thin-film light-emitting diodes, modulators, tunable filters, optical switches, and etc. These achievements fully validating the reliability and flexibility of TP in photonic integration.
1. SOAs:
TP-based C-band SOA achieved a high small-signal gain of 23 dB and an on-chip saturation power of 9.2 mW under 140 mA bias current (high confinement factor). At 160 mA, the saturation power increased to 15 mW, while the gain decreased to 17 dB (low confinement factor).
2. Lasers:
- DFB lasers: operating at a wavelength of 1550 nm under a 70 mA bias current, it demonstrated side-mode suppression ratio (SMSR) exceeding 40 dB and waveguide-coupled output power of 2.2 mW.
- Narrow-linewidth laser: integrated with a Si external cavity, it achieved a wide wavelength tuning range exceeding 100 nm.
- VCSEL: after integration onto the SiN platform, it achieved an SMSR exceeding 45 dB at a wavelength of 850 nm.
3. Photodetectors
- The transferred GaAs photodetectors exhibited responsivity exceeding 104 A/W, detectivity exceeding 1014 Jones, and response/recovery times of only 2.5 ms and 8 ms, respectively.
- The InGaAs detector on SOI platform achieved a responsivity of 0.6 A/W and a 3-dB bandwidth of 17.5 GHz, with a dark current as low as 48 nA.
4. High-speed modulators and switches
- The transferred electro-absorption modulator (EAM) achieved a high extinction ratio (ER) of 30 dB and an electrical bandwidth of 40 GHz in the 1550 nm band.
- The transferred thin film lithium niobate modulator on the SiN platform demonstrated an ER of 39 dB, an insertion loss of 3.3 dB, and a bandwidth of exceeding 50 GHz, supporting high-speed data transmission at 70 Gb/s.
- The MZI optical switch integrated with an SOA achieved an optical gain of 10 dB and an operating bandwidth exceeding 30 nm.
Conclusions and perspectives
- Improve TP accuracy: a commercial state-of-the-art TP tool can achieve ±1.5- and ±0.5-μm alignment accuracy for device arrays and individual device coupon, respectively; thus, the overall TP yield and alignment accuracy require improvement to ensure efficient light coupling from and to Ⅲ-Ⅴ devices.
- Achieve nano-scale TP: nano-scale device transfer onto a target substrate is still challenging due to the microscale stamp design.
- Promote industrial application: tradeoffs must be made between cost, fabrication difficulty, throughput, and operation time; thus, a widely compatible stamp is required for industrialization.
- Facilitate interdisciplinary development: the realizations of on-chip broadband spectrometer with picometer scale resolution, on-chip signal processing and photonic quantum computing are promising proof-of-concepts that highlight the potential of TP technology in other application domains, such as reconfigurable photonic systems, flexible electronics and biocompatible electronics. The integration of pre-fabricated nano-scale optical devices (e.g., nano-wires, nano-grating and optical vortexes) onto PIC platform via TP is also beneficial for the establishment of powerful, complex and cost-efficient nanophotonic systems.
