The aim of the researchers working on CONVOLVE was to find a new way to develop clever yet powerful chips to execute AI calculations close to the user, in their own laptops and smartphones. TU/e researchers and their partners on the CONVOLVE team will present their successes at this year's ESSERC Conference in Spain to an audience that includes leading industry companies.
"We were looking to design and build an efficient chip for so-called edge-computing", lead researcher Manil Dev Gomony explains. "This means that a user who asks AI a question can run the model locally, on their device at the 'edge' of the cloud, instead of sending this command to a remote data center somewhere on earth and receiving the answer."
We need fast and efficient computing power for these hubs in our homes as well.
Manil Dev Gomony, professor of low-power digital hardware design
"Additionally, we are getting more and more smart devices in our homes (solar panels, electric vehicles, heat pumps, in-home energy storage, etc.) that need to quickly determine the best way to operate, given grid congestion, energy prices, and many other variables. We need fast and efficient computing power for these hubs in our homes as well."
That is why Gomony and his colleagues developed and manufactured a powerful chip to do selected AI calculations close to the user: in their own device, and with lower energy demands, too!
Edge-computing versus the cloud
Back in 2022, when the researchers at TU/e started their project , the use of AI was already quite common. The exponential growth of GenAI use in 2026 is staggering and is putting ever greater demands on high-power chips used in large data centers. This drives up energy consumption and the construction of enormous data centers, costing huge amounts of water and having detrimental effects on the environment.
These are exactly the issues Gomony and his colleagues hope to remedy with their revolutionary approach to chip design and computing power.
"Calculations closer to the user cost less energy than sending those requests to the supercomputing data centers that are being used nowadays. And the chips used in datacenters are large and get really hot, so they require their own integrated fans and cooling water, putting a strain on local communities. Making them not only energy-consuming, but also far too large to fit into a laptop, domotics devices, or smartphone."
Different design approach
One of the things the EU-funded and TU/e-led CONVOLVE team changed was the chip design methodology. They developed their methodology specifically to make energy-efficient chips. With research partners in Leuven, Delft, Zürich, and many industry partners, each bringing unique expertise to the project, they managed to design and build the chip they all envisioned. And their measurements prove that they succeeded.
Gomony: "Within CONVOLVE, we used a cross-layer design approach. That means that instead of developing the AI algorithm, processor architecture, memory system, and circuits independently, the team optimized these layers together."
"This allows us to balance several important aspects of the chip's properties (such as accuracy, programmability, processing speed, silicon area, and energy consumption) right from the start of the design process."
Combination
"We combined programmable RISC-V processors with specialized AI accelerators, including memory-centric and neuromorphic computing techniques, to help us achieve our goals. That was important because we aimed to reduce the movement of data between memory and processing units. We did that to conserve energy by design. Data movement is often a major source of energy consumption in AI hardware, such as our chip."
Gomony: "To prove we had succeeded in achieving those goals, we evaluated prototype chips we had fabricated, rather than simulations alone. Our team applied realistic AI workloads to the chip, so we could really see how well it performed. Researchers measured energy efficiency, throughput, latency, silicon area, and application accuracy and compared the results with relevant existing designs, which proved our point."
That is why we need an affordable, green, well-designed EU alternative - and the chip technologies developed in CONVOLVE offer exactly that!
Manil Dev Gomony, professor of low-power digital hardware design
A European answer
There is an enormous inflation of computing power going on. One of the measures used to describe computing speed is the petaflop; one petaflop is 1,000,000,000,000,000 mathematical calculations every single second. In 2010, this would have taken 625.000 iPhone4s.
"Just look at how computing power has evolved. Computing 1 petaflops was what a supercomputer was capable of ten years ago," Gomony continues. "This is the kind of computing power that US-based industry leaders are now ready to make available to consumers. With all the negative side effects of very bad battery life and heavy, large devices."
"That is why we need an affordable, green, well-designed EU alternative - and the chip technologies developed in CONVOLVE offer exactly that! I believe both our design and our methodology will contribute to Europe's competitiveness in smart edge computing processors. And our industrial partners have the edge, because they can be the first to try our new chips and apply our methodology to their fields of expertise."
Gomony's team will present their work and results at the European Solid State conference ESSERC in September. "One of our PhD's, Rick Luiken, will present our European answer to what is happening in the world of processing power. Sharing our research at this conference is the crown on our work."
