In today’s digitalized world, researchers have access to more data than ever before. Generic central processing units (CPUs) and graphics processing units (GPUs) can handle and analyze this data, but they can be slow and inefficient for certain computing tasks. Special types of hardware devices and software programs, called accelerators, can increase the effectiveness of certain computing tasks. While large corporations have teams of programmers and engineers to produce these accelerators, most academic researchers cannot afford this luxury.
To aid the wider research community, computer scientists from Pacific Northwest National Laboratory (PNNL) and Polytechnic University of Milan in Italy created Svelto, a high-level synthesis capability that supports the creation of accelerators for specific tasks. This capability optimizes the automatic translation of parallel programs described in a high-level programming language so the hardware component can leverage an architecture template to implement the computation in the input program. The results of this research were published in IEEE Transactions on Computers.
“We wanted to empower individual researchers to create their own accelerators,” said Antonino Tumeo, co-author of the publication. “This is our way of democratizing chip design.”
Enabling faster analytics
Many research teams seek to explore relationships among large, related data sets that can be represented through graphs, a growing field called graph analytics. Svelto can be readily applied to artificial intelligence algorithms that generate these graphs.
For example, imagine logging in to your social media account. You decide to join an online group featuring your new favorite hobby. Once you click the “join” button, several recommendations for other, similar groups pop up. Based on your pattern of online behavior and the behaviors of similar users, the algorithm provides you with recommendations based on what it predicts you will like. This is an example of graph analytics in action. Other applications include cybersecurity, COVID tracing, and targeted marketing.
“Where traditional CPUs would be inefficient due to long latency times waiting for data, Svelto helps tolerate the latency by leveraging an approach called multi-threading. Svelto provides a template for the automatic generation, through a compiler, of custom accelerators designed specifically for graph analytics and irregular applications,” said Marco Minutoli, co-author of the IEEE publication.
Svelto can be accessed via Github and may be used to generate graph analytics accelerators starting from the code of algorithms. Additionally, any compiler and/or computer architecture expert can contribute to the open source framework.
“This is still very early,” said Vito Castellana, another PNNL co-author, “but our approach could benefit domain science researchers across many different fields, through support for several data science capabilities including data mining, bioinformatics, and machine learning. It could allow computer architecture researchers to quickly explore acceleration of data analysis using new memory technologies.”
Other authors on this publication are Nicola Saporetti, Stefano Devecchi, Marco Lattuada, Pietro Fezzardi, and Fabrizio Ferrandi from Polytechnic University of Milan. The work was funded by the Data-Model Convergence Initiative at PNNL, the Defense Advanced Research Projects Agency Real Time Machine Learning Program, and the High Performance Data Analytics Program at PNNL.