<(From Left) Professor Yang-Kyu Choi, Ph.D. candidate Seong-Yun Yun, (Upper Right) Professor Sanghyeon Kim, Dr. Joon Pyo Kim>
In the era of big data and artificial intelligence, a new approach has emerged for solving combinatorial optimization problems, which involve finding the most efficient solution among many possible options and can otherwise take thousands of years to compute. A KAIST research team has developed computational hardware that can be implemented entirely using existing silicon processes, enabling deployment on existing fabrication lines without additional facilities. This is expected to enable faster and more accurate decision-making across various industries, including logistics, finance, and semiconductor design.
KAIST (President Kwang-Hyung Lee) announced on the 6th of May that a joint research team led by Professor Yang-Kyu Choi and Professor Sanghyeon Kim from the School of Electrical Engineering has implemented an oscillatory Ising machine (a specialized-purpose computer in which multiple oscillating elements interact to find optimal solutions)—a next-generation specialized optimization hardware—using only conventional silicon semiconductor processes.
The research team focused on oscillators that repeat electrical signals periodically. As multiple oscillators exchange signals and synchronize their rhythms, the system naturally reaches the most stable state, and in this process, it finds the optimal solution.
Conventional oscillatory Ising machines have limitations in solving complex problems because it is difficult to precisely control slight frequency differences among oscillators, and the connectivity between elements is limited.
To overcome this, the research team introduced a new approach in which both the oscillators and the couplers are implemented using single silicon transistors, which are the fundamental switching elements of semiconductors.
Through this approach, they reduced frequency deviations among oscillators, enabling stable synchronization, and by using couplers, they implemented multi-level coupling, allowing more precise reflection of problem weights.
As a result, both the ability to represent complex optimization problems and the performance of solution search were significantly improved. Using this technology, the research team successfully solved the representative combinatorial optimization problem known as the Max-Cut problem, which involves dividing a network into two groups to maximize connections.
This problem can be directly applied to various industrial fields such as logistics route optimization, financial portfolio construction, and semiconductor circuit placement. A key advantage of this approach is that it uses the CMOS* process currently employed in the semiconductor industry without requiring special materials or non-standard processes. Therefore, the technology suitable for mass production and commercialization on existing semiconductor production lines without additional facility investment.
*CMOS (Complementary Metal-Oxide-Semiconductor): the most standard process technology in modern semiconductor manufacturing, characterized by very low power consumption and low heat generation, and used to produce chips that serve as the "brains" of almost all digital devices, including smartphones and computer CPUs
<(AI-generated image) Concept diagram of an AI-based silicon aging machine>
Professor Yang-Kyu Choi stated, "This research presents an oscillatory Ising machine hardware that secures both scalability and precision by implementing both oscillators and couplers with silicon devices," adding, "It is expected to be applied to various industrial fields requiring large-scale combinatorial optimization, such as semiconductor design automation, communication network optimization, and resource allocation." He further noted that, as transistor miniaturization approaches its physical limits and increasingly requires atomic-level control, our group has spent the past decade exploring whether the future of transistors should extend beyond scaling toward the discovery of new functions. Futurist Alvin Toffler famously divided the development of society into three stages, describing the modern transition into a knowledge-based society as the "Third Wave." In a similar way, the history of transistor technology, which now spans more than 80 years, may also be viewed in three waves. In 1935, Oskar Heil proposed the concept of controlling semiconductor current with an electric field in a British patent. In 1946, William Shockley developed the first solid-state transistor, an achievement that later led to the Nobel Prize. In 1961, Dawon Kahng invented the modern metal–oxide–semiconductor field-effect transistor, or MOSFET, which remains the foundation of today's mass-produced semiconductor devices. From this perspective, the first wave of transistor technology can be defined as the "switch," and the second wave as the "amplifier." Our laboratory proposes a newly identified third wave: the transistor as an "oscillator." For decades, semiconductor progress has largely been driven by improving the switching and amplification performance of transistors through miniaturization. However, as device fabrication now demands atomic-scale precision, the physical limits of scaling are becoming increasingly apparent. Future transistors therefore require a fundamental paradigm shift—from further miniaturization toward the realization of new functions. The greatest technological significance of this work lies in demonstrating the oscillator as a third fundamental function of the transistor. As a proof of this concept, we experimentally realized a physical Ising machine operating at room temperature.
This research was led by KAIST Ph.D. candidate Seong-Yun Yun and Dr. Joon Pyo Kim as co-first authors, and was published in Science Advances, one of the world's most prestigious scientific journals, on March 27.
※ Paper title: "Scalable Ising machine composed entirely of Si transistors," DOI: 10.1126/sciadv.adz2384
This research was supported by the National Research Foundation of Korea through the Next-Generation Intelligent Semiconductor Technology Development Program, the National Semiconductor Research Laboratory Core Technology Development Program, and the PIM Artificial Intelligence Semiconductor Core Technology Development Program.
